Abstract:  The continuous improvement of the clock frequency of integrated circuits in spacecraft makes the influence of single-event-upset (SEU)on sequential logic become more and more severe,so there is an urgent need to design highly reliable circuits for aerospace applications.Most of the published radiation-hardened latches do not have self-recoverable internal nodes after being affected by a SEU,what′s worse is that they also have high overhead in area,power consumption and delay.In order to solve these problems,a novel highspeed single-event-upset self-recoverable latch based on 130nm partially-depleted silicon on insulator (PD-SOI),combined with radiation-hardened design was proposed.The working principle and simulation results have validated the SEU self-recoverable ability of the proposed latch.Compared with the other self-recoverable latches,the proposed latch greatly reduced the area and delay at the expense of partial power consumption.Detailed comparisons demonstrate that our design saves 71.14% area-powerdelay product (APDP)on average compared with other considered radiation-hardened latches,which means the proposed latch is a promising candidate for future highly reliable advanced aerospace applications.

Key words: PD-SOI, single-event-effect, single-event-upset, radiation hardened by design, radiation hardened latches