Abstract: An image hardware decompression system based on the RBC algorithm is designed. Firstly,the decoding flow of RBC is described in this pap er. Secondly, a VLSI architecture realizing this decoding algorithm is proposed. Finally,the VLSI architecture is implemented in FPGAs,and decompression ASICs ar e produced.Test results show that the data processing speed of the hardware syst em made up of these ASICs is so fast that meet the requirement of real-time imag e decompression.