Abstract: VL SI architecture based on the RBC algorithm is developed. The architecture is fastwith low hardware complexity,which can compute huge amount of data at very high speed for real- time compression application and match the requirement of VL SI architecture,regularity,modularity,locality.Based on the architecture,special chip for real- time image compression is designed and manufactured with Field Programmable Gate Array.The peak processing speed of the ASIC can reach2 88Mbit/s and their power consumption is lower than1W.